1) Field of the Invention
The present invention generally relates to a stabilized constant-voltage circuit, and more particularly to a stabilized constant-voltage circuit having a feedback loop used for stabilizing an output voltage of the stabilized constant-voltage circuit.
2) Description of the Related Arts
In a semiconductor integrated circuit, a constant-voltage circuit having a feedback loop used for stabilizing an output voltage is frequently used as a reference voltage source. For example, U.S. Pat. No. 4,795,918 (which corresponds to Japanese Laid-Open Patent Application No. 64-46812) discloses a bandgap type reference voltage circuit, which is one typical example of a constant-voltage circuit. Such a bandgap type reference voltage circuit is frequently used in a bipolar type integrated circuit as a reference voltage source which depends on temperature very little.
FIG. 1A is a circuit diagram of another bandgap type reference voltage circuit, and FIG. 1B is a circuit diagram equivalent to the circuit shown in FIG. 1A. A differential amplifier or an operational amplifier 10 shown in FIG. 1B is composed of transistors Q3 through Q6 and a resistor R4 shown in FIG. 1A. A current amplifier Ai is composed of transistors Q7 and Q8 and a resistor R5. A constant-current source 11 supplies a constant current necessary to operate the entire circuit. A feedback control is employed so that inverting and non-inverting input terminals of the differential amplifier 10 are approximately equal to each other. A feedback loop extends from the collector of the transistor Q4 to the base thereof via the transistors Q7 and Q8 and the resistor R2. A capacitor C1 functions as a phase compensation capacitor which decreases a feedback voltage gain (loop gain) in a high frequency range and prevents the circuit from oscillating.
It is assumed that currents passing through resistors R1 and R2 are represented by I1 and I2 and a base-emitter voltage of the transistor Q1 is represented by V.sub.BE1. When the base currents of the transistors Q1 and Q2, an input bias current and an offset current of the differential amplifier 10 are negligible, an output voltage V.sub.BG obtained at the collector of the transistor Q8 shown in FIG. 1A is expressed as follows. EQU V.sub.BG =V.sub.BE1 +{(R2/R3)(kT/q)}1n(I1/I2) (1)
where k is the Boltzmann constant, T is the absolute temperature and q is a charge of an electron.
The first term on the right side of the equation (1), V.sub.BE1, has a negative temperature coefficient approximately equal to -2mV.degree.C. On the other hand, from the relationship, I1&gt;I2, the second term on the right side of the equation (1) has a positive temperature coefficient. Thus, by selecting an appropriate value of the resistor R2, it becomes possible to set the temperature coefficient at zero.
As has been described previously, the phase compensation capacitor C1 is employed in order to decrease the loop gain in the high frequency range and prevent the circuit from oscillating. However, in a case where the capacitor C1 is formed of an on-chip capacitor, the chip size becomes large. For this reason, the use of an on-chip capacitor is not effective nor efficient in practical use.
It is conceivable to provide an emitter resistor R.sub.E connected to the emitter of the transistor Q7 in order to decrease the loop gain. However, it is possible to sufficiently decrease the loop gain only when the emitter resistor R.sub.E is equal to or greater than a few tens of kiro-ohms. This leads to an increase in the chip area. Further, when the emitter resistor R.sub.E equal to or greater than a few tens of kiro-ohms is used, the transistor Q4 is saturated because of a voltage drop which develops across the emitter resistor R.sub.E, so that the differential amplifier 10 does not operate correctly.